Why Journal ICON

A Bi-Monthly and Multidisciplinary Journal, High Quality Papers, Peer Review process, Open access policy, Fast Publication, Full Archive for life time

Why Journal ICON

A Bi-Monthly and Multidisciplinary Journal, High Quality Papers, Peer Review process, Open access policy, Fast Publication, Full Archive for life time

Why Journal ICON

A Bi-Monthly and Multidisciplinary Journal, High Quality Papers, Peer Review process, Open access policy, Fast Publication, Full Archive for life time

Why Journal ICON

A Bi-Monthly and Multidisciplinary Journal, High Quality Papers, Peer Review process, Open access policy, Fast Publication, Full Archive for life time

Why Journal ICON

A Bi-Monthly and Multidisciplinary Journal, High Quality Papers, Peer Review process, Open access policy, Fast Publication, Full Archive for life time

Tuesday, November 20, 2018

QCA Design Of Encoder For Low Power Memory Applications

Journal ICON
Year: 2018 | Volume: 3 | Issue: 6 | Paper ID: ICON030618002
QCA Design Of Encoder For Low Power Memory Applications

R.Bharathi Vidhya and Prof. G.Kanagaraj

Abstract: Quantum-dot fabrication and characterization is a well-established technology, which is used in photonics, quantum optics and nan electronics. Four quantum-dots placed at the corners of a square form a unit cell, which can hold a bit of information and serve as a basis for Quantum-dot Cellular Automata (QCA) nan electronic circuits. Although several basic QCA circuits have been designed, fabricated and tested, proving that quantum-dots can form functional, fast and low-power nan electronic circuits, QCA nan electronics still remain at its infancy. One of the reasons for this is the lack of design automation tools, which will facilitate the systematic design of large QCA circuits that contemporary applications demand. Here we present novel, programmable QCA circuits, which are based on crossbar architecture. These circuits can be programmed to implement any Boolean function in analogy to CMOS FPGAs and open the road that will lead to full design automation of QCA Nano electronic circuits. Using this architecture design and simulation of QCA circuits have proved to be area efficient, stable and reliable.

Multiple Cell Upset Tolerant Error Detection And Correction Code For Semiconductor Memories Using DSSC

Journal ICON
Year: 2018 | Volume: 3 | Issue: 6 | Paper ID: ICON030618001
Multiple Cell Upset Tolerant Error Detection And Correction Code For  Semiconductor Memories Using DSSC

V.Kalaivani and Prof.M.Rojaramani

Abstract: Errors that affect memories are a major issue in advanced electronic circuits. As technology scales, multiple bit errors become more likely. This limits the applicability of traditional protection techniques like Matrix code or single error correction codes that can correct only one error. Multiple errors tend to affect adjacent bits, and therefore it is interesting to use error correction codes that can correct adjacent errors. The issue with these codes is that they require a large area and delay that limits their use to protect flip-flops in circuits. This project presents the implementation and evaluation of the Data Segmentation Section Code (DSSC), a new algorithm for the detection and correction of multiple transient faults in volatile memories with low cost implementation. .our proposed system has been coded in Verilog HDL and simulated using Xilinx 12.1.

Monday, September 3, 2018

A Study on Split Domination Number of a Graph

Journal ICON
Year: 2018 | Volume: 3 | Issue: 4 | Paper ID: ICON030518001
A Study on Split Domination Number of a Graph

R.Sheela Navarose and C.Chithiraiselvi

Abstract: this paper we have briefly study about the split domination number of graphs .A graph is a graph in which the vertices can be partitioned in to a clique and an independent set.